Cecil Symes

Design Verification Engineer at Astera Labs

Cecil Symes has worked as a Design Verification Engineer at Astera Labs since 2023. From 2019 to 2022, they volunteered as the Lead Events Coordinator and IT for the Eastern Students Association Committee at the University of Auckland, planning and coordinating events for up to 200 members at a time. They were also a member of the AESIR committee, a coalition of eight of the largest Asian social clubs at the University of Auckland. In 2019, Cecil held a Summer Research Scholarship at the University of Auckland.

Cecil Symes studied Computer Systems Engineering at The University of Auckland from 2018 to 2021, earning a Bachelor of Engineering (BE Honors) degree. From 2022 to 2023, Cecil pursued a Master of Engineering (MEng) degree in Electrical and Electronics Engineering & Computer Science at the University of California, Berkeley.

Links

Timeline

  • Design Verification Engineer

    June, 2023 - present