George Thomas is a seasoned hardware engineer with extensive experience in the semiconductor industry. Currently serving as a Member of Technical Staff at Astera Labs since May 2021, George has previously held roles such as Senior Staff Hardware Engineer at Inphi Corporation and Senior Hardware Engineer at Marvell. At Inphi Corporation, George led projects focused on 28Gbps SERDES and 56Gbps PAM4 Signaling SERDES, with expertise in analog and mixed signal chips, test automation using Python, and evaluation board design. George's earlier experience includes significant contributions to storage read channel SoC teams and compliance products for industry standards at Marvell, as well as work in advanced product engineering at Altera. George holds a Master of Science in Electrical Engineering from Texas A&M University and a Bachelor of Engineering in Electrical Engineering from M.S. University of Baroda.
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