Qi Chen

Qi Chen is an experienced engineer specializing in signal integrity and system memory enabling, currently serving as a Principal Hardware Engineer at Astera Labs. Previous roles include Signal Integrity Engineer positions at Intel Corporation, Juniper Networks, and Lorom Group Ltd. Additionally, Qi Chen has held roles as a Research Assistant, Graduate Assistant, and Teaching Assistant at the University of South Carolina. Qi Chen holds a Master of Science in Electrical Engineering from the University of South Carolina and a Bachelor of Science in Electrical Engineering from Harbin Institute of Technology.