Somasunder Sreenath

Somasunder Sreenath is a Senior Director of Design Verification at Astera Labs, with a robust career in semiconductor and IP development. Previously, Somasunder served as Senior Director at Samsung Semiconductor, leading IP development activities and overseeing design verification for foundry operations across automotive and mobile systems. Somasunder's experience includes roles as Design Engineering Director at Cadence Design Systems, where management of verification teams for various PHY IPs was a key responsibility, and Principal Engineer at Cosmic Circuits. Somasunder began a significant tenure at Texas Instruments, managing a team focused on digital front-end design and verification for mixed-signal IPs. Somasunder holds a Bachelor of Engineering in Electrical, Electronics, and Communications Engineering from the National Institute of Technology Karnataka.