William Wang is currently a Senior Electrical Validation Engineer at Astera Labs, focusing on 50G and 100G Ethernet Retimer technologies. Previously, they held roles such as Senior System Validation Engineer at Marvell Technology, Embedded Software Engineer at May Mobility, and Signal Processing Engineer at Raytheon Technologies, where they worked on high-speed connectivity and radar systems. They also contributed as a Research Technician at the University of Michigan Transportation Research Institute and as a Research Assistant in the Interactive and Sensing Lab. William obtained a Bachelor's degree in Computer Engineering and a Master's degree in Electrical Engineering from the University of Michigan.
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