Sankalp Dev possesses a solid background in electrical and electronics engineering, complemented by a Master's degree in VLSI Design from the National Institute of Technology Karnataka, achieving an 8.2 CGPA. Professional experience includes roles as an ASIC Hardware Verification Intern and ASIC Hardware Verification Engineer at Auradine from June to December 2024. Prior internships include hands-on training at Bharat Heavy Electricals Ltd Jhansi, focusing on power transformer assembly, and a month-long experience at Heidelberg Cement Jhansi, involving the study of HV slipring induction motors and basic switchgear elements. Additional experience includes a position at Calligo Technologies and a role in the EDG at MathWorks. Academic qualifications stem from the Institute of Engineering & Technology, where a Bachelor of Technology degree in Electrical and Electronics Engineering was earned with a 73% score. Early education includes notable performance at both Mahatma Hansraj Modern School and The Woods Heritage School.
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