Pol Avet is an FPGA Expert at Barco since September 2023. Prior to this role, Pol Avet served as the Competence Manager for Digital Hardware Engineering at Newtec from September 1999 to October 2023. Earlier experience includes working as a System Architect at Verhaert | Masters in Innovation, focusing on hardware architecture for space projects, including the ISS, from September 1998 to August 1999. Pol Avet also held the position of Hardware Design Engineer at Picanol from May 1987 to September 1998, specializing in the development and architecture of control units for weaving looms, including board design and FPGA work. Pol Avet holds a Master of Engineering (M.Eng.) in Electrical and Electronic Engineering from KU Leuven.
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