Arth Mehta

Arth Mehta is an ASIC Verification Engineer with over 7 years of experience in Functional Verification of complex ASIC designs. Currently serving as a Senior Design Verification Engineer at Broadcom, Arth has extensive hands-on experience with industry-standard interfaces such as CXL, LPIF, and PCI Express. Previously, Arth worked at Intel Corporation, developing verification environments for 10nm and 7nm Server SoCs, and has a strong foundation in SystemVerilog, UVM, and OVM methodologies. Arth earned a Master of Science in Computer Engineering from George Mason University and holds a Bachelor of Engineering in Electronics and Telecommunication Engineering from the University of Pune.