Ashish Pandey

Ashish Pandey is a Senior Principal Engineer at Broadcom, where they leverage their extensive expertise in hardware languages like Verilog and VHDL, as well as various protocols and memory technologies. With prior experience at companies such as Intel, STMicroelectronics, and Satyam Computers, Ashish has developed a strong foundation in hardware emulation and verification, particularly involving complex SoC designs. They hold a Bachelor of Technology in Electrical, Electronics and Communications Engineering and have pursued specialized training in VLSI and Embedded Systems.