Balwant Kulkarni

Balwant Kulkarni is a Principal Design Verification Engineer at Broadcom, having transitioned to this role in 2024 after serving as a SOC Design Verification Lead at Intel Corporation from 2011 to 2024. With expertise in System Verilog and UVM methodology, they contributed significantly to multi-socket SOC topologies and cache coherent fabrics. Balwant holds a Master of Science in Electrical Engineering with a focus on VLSI Design from the University of Southern California, where they designed complex digital systems and processors. Prior to their engineering career, they worked as a Programmer Analyst at Cognizant Technology Solutions, developing applications using Java technology.