Deepesh N.

Deepesh N. is a Senior Staff Engineer at Broadcom, specializing in RTL design and verification, Verilog modeling, logic synthesis, physical design, and static timing analysis. Deepesh's career includes a position as a Senior Design Engineer at NetLogic Microsystems from 2006 to 2012 and an internship at the Indian Space Research Organisation in 2006. Deepesh holds a Bachelor of Engineering in Electronics and Communication Engineering from L.D. College of Engineering, which was completed in 2006.