Ivan Rezki is a Principal IC Design Verification Engineer at Broadcom, where they focus on the design verification of WiFi chips using SystemVerilog UVM. Previously, Ivan worked as an ASIC Verification Engineer and Team Lead at NTLab, and held various engineering roles at Samsung Electronics, concentrating on CMOS Image Sensors. Ivan began their career developing FPGA prototypes for mobile camera applications and has contributed to multiple chip tape-outs throughout their career. They hold a Master’s degree in Electronic Engineering and Post-Graduate education in Engineering, focusing on Signal Processing, from the Belarusian State University of Informatics and Radioelectronics.
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