Jiarong Mo is currently a Staff Analog/Mixed Signal Design Engineer at Broadcom, a position held since 2019. Previously, Jiarong worked as a Senior Analog/Mixed Signal Design Engineer at Broadcom and LSI, an Avago Technologies Company, from 2013 to 2019. Jiarong holds a Bachelor’s degree in Electronic Science and Technology from Xidian University and a Master’s degree in Electrical Engineering from Arizona State University. Throughout their career, Jiarong has specialized in high-speed analog circuit design and chip-level verification.
This person is not in the org chart
This person is not in any teams
This person is not in any offices