Jiawen Zhang

Jiawen Zhang is a Principal Analog Design Engineer at Broadcom, where they have focused on high-speed analog and mixed-signal design since 2014. They earned a Bachelor’s degree in Microelectronics from Tsinghua University in 2012 and a Master’s degree in Electrical Engineering from Columbia University in 2013. Jiawen began their career with an internship at Vimicro Corporation, where they developed a 10-bit high-speed video DAC IP core. They also served as a research assistant at Columbia University, contributing to projects on RF front-end design under Professor Peter Kinget. Currently, Jiawen holds four U.S. patents and engages in research primarily centered on SerDes and ultra-high-speed data converters.