Jing Li is a Principal Design Engineer at Broadcom, a position held since 2010. Prior to this, Jing worked as a Principal Design Engineer at Telegent Systems from 2008 to 2010, and held roles as an ASIC Design Manager at Genesis Microchip and as a Sr. ASIC Design Manager at Legend Silicon. Jing commenced their career as a Sr. ASIC Design Engineer at LSI Logic from 1998 to 2005.
Location
San Jose, United States
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