Jingguang Wang is a Principal Analog Design Engineer at Broadcom, where they have been involved in Gigabit Ethernet PHY and Automotive UTP PHY since 2008. Previously, they worked as an RF and Mixed Signal Design Engineer at RDA Microelectronics, focusing on DVB-S tuners from 2006 to 2007. Jingguang holds a Bachelor’s and Master’s degree in Electrical Engineering from Fudan University, and an additional Master’s degree in Electrical Engineering from Oregon State University.
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