Marek Smoszna is a High Speed Memory Design Engineer at Broadcom Inc. since May 2021, specializing in SRAM memory component design, memory compiler flow, and timing analysis. With a strong background in academia and industry, Marek has also served as a course developer and writer focused on electronics design since 2011. Prior experience includes roles as a technical writer at Seiko Epson Corporation and a custom circuit design consultant at Cornami, Inc., along with significant positions at Wave Computing, AMD, Intel Corporation, and Soft Machines. Academically, Marek holds multiple degrees and certifications in Electrical and Computer Engineering from prestigious institutions, including a Master's from Rensselaer Polytechnic Institute and Certificates in VLSI Circuit Design from Stanford University.
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