Michael Inerfield

Michael Inerfield is a Senior Engineering Manager at Broadcom, where they lead the development of DSL chips and oversee WLAN baseband projects. With 18 years of industry experience, they have been responsible for all phases of design, verification, characterization, and production of DSL chips to meet various standards. Michael's expertise includes high-speed analog and mixed-signal circuit design, particularly in ADCs, and they are proficient in tools such as Matlab, Simulink, and VerilogA. They earned a Ph.D. in Electrical Engineering from Case Western Reserve University, following a B.E. from The Cooper Union.