Murali Gala

Murali Gala currently serves as a DFT Lead/Architect at Broadcom Inc., leading pre-silicon and post-silicon activities for customer AI/ML processors since May 2019. Previously, Murali held the position of Engineering Manager in the DFT group at Intel Corporation, focusing on 5G modem technologies from May 2018 to May 2019. Prior experience includes a tenure at Oracle as Senior Principal/Distinguished Engineer and Principal Engineer, where Murali specialized in DFT architecture and silicon debug for multi-core SPARC processors, emphasizing test volume reduction and yield enhancement. Early career stages involved roles at Sun Microsystems as Senior Staff Engineer and Staff Engineer, contributing to DFT architecture and testing for SPARC processors and network products. Murali completed a Doctor of Philosophy (PhD) in Electrical and Computer Engineering from Texas A&M University.