Radoslav Veselinov is a Java enthusiast currently working as a Staff R&D Engineer at Broadcom since 2024. They have held various roles throughout their career, including Senior Developer at ProSyst Labs Bulgaria and Lead Software Engineer at Intracol Technologies. Radoslav also served as an Expert Developer and later as a Senior Developer at SAP Labs Bulgaria and worked as a Software Engineer at Cisco Systems from 2012 to 2014. Prior to their extensive experience in the software industry, they earned a BS in Computer Techniques and Technology from the Technological School – Electronic Systems in Sofia, where they studied from 1993 to 1998.
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