Raghavendra Shet is a Staff Design Engineer at Broadcom Inc., where they focus on novel receiver architectures and high-frequency designs supporting various DDR standards. Previously, Raghavendra worked as a Senior I/O Circuit Design Engineer at Broadcom Limited and as an R&D Engineer at IBM. Raghavendra has completed a Master of Science in Microelectronics from Manipal University and holds a Bachelor of Engineering in Electronics and Communication from Gogte Institute of Technology. They have successfully designed various high-speed circuits and gained expertise in multiple aspects of integrated circuit design.
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