Ramin Babaee

Ramin Babaee is currently a Principal IC Design Engineer at Broadcom, focusing on PHY design for optical and electrical interconnects. Prior to this role, they were a Senior Research Scientist at Ciena from 2013 to 2025, specializing in DSP algorithm design for coherent optical transmission, and a System Developer at Ericsson from 2011 to 2013, contributing to the architecture design of multi-standard radio base station products. Ramin began their career as a DSP Engineer at Rad3 Communications Inc. in 2011, working on digital communications systems for ASIC and FPGA. They hold a PhD in Electrical Engineering from the University of Ottawa, a Master’s degree from the University of Alberta, and a Bachelor’s degree from the University of Tehran.