Roman Pasternak is a seasoned Sr. Principal Engineer at Broadcom, specializing in the design of Integer and Frac-N PLLs for advanced CMOS technology nodes. With a career in the wireless communication industry beginning in 1998, Roman has contributed to major projects at prominent companies including Motorola, Intel, and Beceem Communications. Roman's expertise encompasses RF system and IC engineering across various cellular standards, including GSM, WCDMA, and WiMax. They earned a Master's degree in electrical science from Ben-Gurion University of the Negev.
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