Sajith KA

Sajith KA is a Principal Engineer at Broadcom with over 20 years of professional experience in front-end design, implementation, and verification. They have worked extensively in SoC, subsystem, and IP design, contributing to the development of more than 15 multi-core SoCs and serving as lead engineer for over five multi-core CPU subsystem designs. Sajith has expertise in ARM architecture, low power design, verification, and FPGA prototyping, with a strong understanding of various bus protocols and system peripherals. They earned a Master of Science in Electronics from Cochin University of Science & Technology with distinction.