Seth Qu is a Principal Design Verification Engineer at Broadcom, where they have worked since 2015, focusing on infrastructure and networking. Seth holds a Master’s Degree in Electrical and Electronics Engineering from the University of Southern California, obtained in 2010. Prior to their role at Broadcom, Seth was a Senior Design Verification Engineer at Qualcomm and a Senior Verification Engineer at Marvell Semiconductor, where they specialized in testbenches development using SystemVerilog and UVM.
Location
San Francisco, United States