Shekhar Agrawal is a Principal Engineer at Broadcom with over 15 years of experience in design verification. Currently, Agrawal focuses on the verification of networking ASICs for hyperscale data centers, leveraging expertise in functional and formal verification using System Verilog and UVM. Previously, Agrawal held roles at Qualcomm, Mirafra Technologies, Samsung India, and SanDisk, contributing significantly to various verification projects, including full chip verification and peripheral IPs. Agrawal earned a Bachelor of Technology in Electrical, Electronics, and Communications Engineering from the Indian Institute of Technology, Madras.
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