Sree Janardhanan

Sree Janardhanan is a DFT Manager with expertise in the design, implementation, and verification of DFT techniques on complex ASIC designs. They have collaborated with cross-functional teams to define STA and synthesis constraints and possess extensive hands-on experience with scan insertion and other DFT methods on multi-million gate designs. Currently, Sree defines DFT architecture for various schemes while also developing automated flow processes to enhance efficiency. They previously held roles at companies such as Wipro Technologies, Broadcom Inc., and NVIDIA, contributing significantly to DFT structures and architecture. Sree is pursuing a BE in Electronics and Communication from Maulana Azad National Institute of Technology and a Master's degree in Microelectronics from Birla Institute of Technology and Science, Pilani.