Vignesh Manoharan

Vignesh Manoharan is a Principal Engineer at Broadcom, with previous roles including Verification Lead/Architect at Aeva and Pre-Si Valid/Verif Lead Engineer at Intel Corporation. Experience spans various positions focusing on verification methodologies, architecture development, and simulation flow enhancements across multiple companies including Broadcom, Atmel, Qualcomm, Cypress Semiconductor, L&T Infotech, Kacper Technologies, and CVC. Vignesh has successfully contributed to the development of verification platforms, significantly reduced environment bring-up times, and ensured zero functional bugs in multiple tapeouts. Educational qualifications include an M.Tech in VLSI Design from Vellore Institute of Technology and a B.E in Electronics and Communication Engineering from Anna University Chennai.