Yong Li

Yong Li is a Principal Engineer in Analog IC Design at Broadcom, bringing extensive experience in the semiconductors industry. They have demonstrated expertise in lower power PMU architecture for SOC, RF, PLL, analog circuit design, and CMOS technologies. Yong previously held roles as a Staff RFIC Design Engineer/Project Lead at Panovel Technology Corporation and as a Senior RFIC Engineer at Fujitsu Semiconductor Asia Pte Ltd. They earned a Master's degree in Microelectronics from East China Normal University, where they also completed their Bachelor's degree in the same field.