Yueyong Wang is a Senior Principal Engineer at Broadcom, specializing in analog and mixed signal IC design since 2015. Previously, Yueyong held the positions of Master Engineer and Principal Engineer at Broadcom, contributing to IP development and physical layer product design. With over a decade of experience at Rambus as a Senior Analog and Mixed Signal IC Design Engineer, Yueyong focused on high-speed interfaces and PLL frequency synthesizers. Their expertise encompasses various standard interfaces, including PCI Express and DDR PHY.
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