Libin Chen is currently a Senior Principal Application Engineer at Cadence Design Systems, specializing in digital physical design, power analysis, and EDA software support with extensive experience in mixed signal and digital flows. With over ten years in the IC industry, Libin has contributed to significant projects including power signoff for ultra-large-scale chips with up to 800 million instances, covering advanced nodes from 3nm to 16nm. Previous roles include engineering positions at Shenzhen State Microelectronics, Teralane Semiconductor, and Shenzhen Jingxun, where expertise in IC layout and digital P&R was honed. Libin is also skilled in Linux server maintenance and programming in csh and Tcl.
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