Akshitha L is an Analog Layout Engineer at Capgemini since July 2024, previously serving as a VLSI Trainee- Digital Design at Capgemini Engineering from January 2023 to August 2023. Akshitha earned a Bachelor of Technology in Electronics and Communication Engineering from Presidency University Bangalore, graduating in 2023 with a notable academic performance of 8.4/10. Earlier education includes a Pre-University qualification from Jindal College of Education for Girls, focusing on the PCMB stream.
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