Zeng Jason

Zeng Jason (Jiejun) is a Principal Design Engineer at Broadcom Ltd, with over 10 years of experience in high-speed SerDes design and extensive knowledge in high-speed SerDes system structures and block designs. They have a proven track record in successfully designing SerDes from 16G to 112G NRZ/PAM4 and have worked on PCIe 3.0/4.0 PCS/SerDes designs. Zeng has also held key positions at Freescale Semiconductor, LSI, NXP Semiconductors, and Avago Technologies, showcasing a robust background in IP/ASIC/SOC design and verification. They are fluent in both English and Chinese and have contributed as a member of the Board of Directors at CASPA. Zeng earned both a Master's and a Bachelor's degree from Xi'an Jiaotong University.