Uma Varshney is an experienced Analog & Custom Layout Design Engineer with a strong background in the semiconductors industry. They have a Bachelor of Technology in Electronics and Instrumentation from Uttar Pradesh Technical University. Uma has held various positions, including Project Engineer at Wipro Technologies and Analog Design Engineer at Sankalp Semiconductor Pvt Ltd, where they specialized in Analog & Mixed Signal layout design. Currently, they serve as a Senior Technical Lead at Cerium Systems, utilizing their expertise in advanced technologies such as 7nm and 10nm.
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