Sriskaran Viros

Sriskaran Viros is an Analog and Mixed-Signal ASIC Designer with substantial experience in the field of microelectronics. They completed a Master Thesis Project at CERN in 2016, focusing on ASIC design for pixel detector readout chips. Sriskaran is currently a Senior Fellow at CERN, where they develop novel hybrid silicon detectors and lead the design of analog front-end electronics for the PicoPix chip. They hold a Ph.D. in Microsystems and Microelectronics from École polytechnique fédérale de Lausanne, where they also obtained a Master of Science in Micro and Nanotechnologies for Integrated Systems.