Christopher Perez

Christopher Perez has over 13 years of work experience in the field of electronics design. Christopher began their career in 2006 as a Research Intern at Xilinx. In 2008, they joined MEI Technologies, Inc. as a Senior Systems Engineer, where they developed synchronous triple-module redundancy (TMR) FPGA test designs and analyzed SRAM FPGA configuration memory sensitivities to SEE. In 2011, they moved to Innovim as a Senior Systems Engineer, where they designed FPGA logic for NASA GSFC Soft X-Ray Spectrometer (SXS) instrument and a preliminary FPGA for science data acquisition and streaming for NASA GSFC Solar Physics sounding rocket program EUNIS. In 2012, they joined Orbital Sciences Corporation as a Principal Engineer, where they designed and verified FPGAs on communications and control cards serving C&DH sub-systems for next-generation GeoSTAR geosynchronous satellite bus platform. In 2014, they joined Ideal Power Inc. as a Senior Firmware Engineer, where they designed logic targeting Altera Cyclone-V family of FPGAs for system controller cards controlling high-voltage switch behavior and power conversion algorithms. Finally, in 2019, they joined CesiumAstro as a Principal Electronics Design Engineer.

Christopher Perez attended the Massachusetts Institute of Technology from 2002 to 2007, where they received a Master of Engineering in Electrical Engineering.