Christopher Wells is a Senior DevOps Engineer at CesiumAstro, where they improve and optimize FPGA development workflows. They previously worked as a Digital Design Engineer at IntelliProp Inc. from 2014 to 2022, focusing on designing HDL for storage applications and developing firmware for embedded systems. Additionally, they served as an Embedded Firmware and FPGA Test Engineer at Capella Space in 2025 and as an AMD/Xilinx Dedicated Field Application Engineer at Avnet from 2022 to 2025. Christopher holds a degree in Electrical Engineering Technology from Metropolitan State University of Denver, where they studied from 2011 to 2014.
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