Anastasios Panagis is currently a Senior Analog IC Layout Engineer at Ceva Inc., where they lead the IC layout team. With over 14 years of experience in the semiconductor industry as an Analog RF IC layout engineer, they have specialized in deep submicron technology RF layout, working on various components such as VCOs, mixers, LNAs, and VGAs. Their technical expertise includes both semi-custom and full custom CMOS and BiCMOS layouts across multiple technology nodes. Anastasios previously worked as an Analog RF IC Layout Engineer at Ceragon Networks and Theta Microelectronics, contributing to the advancement of RF layout designs in the industry. They are pursuing a Bachelor of Science degree in Electrical Engineering from the National Technical University of Athens.
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