Srdjan Radulovic

Srdjan Radulovic is a Senior Design Verification Engineer at CEVA, Inc., drawing upon extensive experience in embedded systems, digital design, and verification. Previously, they worked as a Verification and Design Engineer at ELSYS Eastern Europe, where they led a small team and developed verification components for ASIC and FPGA platforms. Srdjan's earlier roles included FPGA Engineer at RT-RK and Embedded Software Developer at IMP-Telecommunications, where they honed their skills in programming, Linux, and hardware development. Srdjan holds a Master’s degree in Electrical and Computer Engineering from the Faculty of Technical Science, Novi Sad, and possesses deep knowledge of various programming languages and simulation environments.