Jorgen Carstensen

Jorgen Carstensen possesses extensive experience in the field of semiconductor engineering, with a career spanning over two decades. Jorgen began as a Team Leader at IP Semiconductors from April 1999 to August 2002 and subsequently held the role of Senior FPGA Development Engineer and Team Lead, FPGA at Napatech from January 2007 to July 2015. Following this, Jorgen served as Team Leader - Digital ASIC at Thrane & Thrane from 2003 to 2004 and later transitioned to Comcores ApS, where Jorgen held multiple positions including Senior FPGA Development Engineer, Engineering Manager, and Research and Development Manager from August 2015 to April 2018. Currently, Jorgen is the Research and Development Manager at Chip Interfaces since January 2024. Jorgen holds a Master of Science degree from Danmarks Tekniske Universitet, obtained in 1999.