Ana Jovanovic

An experienced Digital Design Engineer with a background in FPGA emulation, ASIC design, and OSVVM verification. Ana Jovanovic has worked at Chipglobe since December 2020 and previously at HDL Design House for six years. Ana also gained experience as a Digital Design Verification Intern at ELSYS Eastern Europe. Ana holds a Bachelor's Degree from the School of Electrical Engineering, University of Belgrade.