Amin Monfared

Amin Monfared is an accomplished ASIC Design Engineer with extensive experience in the field. Currently serving as ASIC Design Prime and Staff ASIC Design Engineer at Ciena since March 2021, Amin has held roles including Senior ASIC Design Engineer. Prior to Ciena, Amin worked at Western University from September 2015 to April 2021 as a Postdoctoral Researcher and Embedded System Designer, focusing on secure architectures for cryptographic protocols, along with FPGA implementation and design evaluation. Additionally, Amin contributed as a Research Assistant and Teaching Assistant at Western University, covering various courses. Earlier experience includes designing advanced DSP algorithms at Bina Co and conducting research on network-on-chip designs at Sharif University of Technology. Amin holds a PhD in Electrical and Electronics Engineering from Western University, alongside a Master’s and Bachelor’s degree in the same field from Sharif University of Technology and Ferdowsi University of Mashhad, respectively.