Amit Saluja is a Principal Engineer at Ciena, where tenure began in April 2008, focusing on high availability architecture design for Packet/Optical platform products with recent exposure to the Packet Domain. Previously, as a Lead Engineer, responsibilities included board bring-up, device driver development on Linux, and algorithm creation for timing distribution in CLOS architecture chasses. Prior experience includes a role as Module Lead at Hughes Systique Corporation, where Amit worked with 3GPP protocols and designed a testing framework for the Network GPRS stack. Additional experience encompasses positions at NeoMagic Semiconductors and Conexant Systems, where Amit began as an engineer trainee and progressed to roles as a Software Engineer. Amit holds an MCA degree from BIT Mesra, obtained between 1999 and 2002.
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