Larry Davidson

Larry Davidson is a seasoned Senior Verification Engineer with extensive experience in architecting and implementing System Verilog UVM based verification environments for FPGA logic verification. Currently employed at Ciena since January 2016, Larry has held similar positions at Virtual Instruments, VSS Monitoring, Harmonic Inc., Cloudshield Technologies, and others, focusing on supporting design teams in high-paced environments, leading verification initiatives, and building comprehensive verification test environments that include generators, drivers, and monitors. Notably, Larry led a team of verification engineers at VSS Monitoring and contributed to the verification of processor designs at Montalvo Systems, showcasing a strong background in logic verification and test environment construction throughout a diverse career in the field.