Rishabh Jain

Rishabh Jain is an experienced FPGA Design Engineer at Ciena, where employment began in June 2020, following a co-op as an Embedded Software Developer with the same company from January to August 2019. Prior experience includes a Digital Design Engineering Student role at IDT - Integrated Device Technology, Inc. in late 2017, focusing on lab validation of ASIC devices using Python scripting and various lab equipment. Additionally, Rishabh served as a Junior ASIC Verification Engineer in a co-op position at Rianta Solutions Inc. in mid-2017, employing System Verilog and UVM for designing test operations and collaborating with professional engineers. Rishabh's early career included customer service roles at Farm Boy Inc. and Walmart. Rishabh holds a Bachelor of Engineering in Electrical and Electronics Engineering from Carleton University, earned between 2015 and 2020.