Sandy Gunawan

Sandy Gunawan has over 28 years of experience in the engineering field, specializing in FPGA and ASIC verification. Currently a Senior FPGA Verification Engineer at Ciena since July 2015, Sandy previously served as a Senior ASIC/FPGA Consultant at Precise-ITC, Inc. from November 2013 to July 2015 and as a Senior ASIC Verification Engineer at IDT from July 2009 to October 2013. Earlier in the career, Sandy worked at Tundra Semiconductor from October 1995 to July 2009 in roles as both an ASIC Verification Engineer and an Applications Engineer. Sandy holds a Bachelor of Engineering degree in Electrical Engineering from Carleton University, completed in 1995.