Deepti M. is an ASIC Engineering Technical Leader at Cisco, currently leveraging 22 years of experience in full chip integration, focusing on managing the PnR flow and achieving timing closure. Previously, Deepti held various roles at ST Microelectronics, including Technical Leader and Staff Engineer, where responsibilities involved semicustom flow and design management. Deepti earned a Master of Science in Electronics from Delhi University.
Location
Scottsdale, United States
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