Prakash Ramesh is an experienced engineer specializing in ASIC physical verification, currently serving as the ASIC Physical Verification Lead at Cisco since March 2025. Prior to this role, Prakash Ramesh worked at Intel Corporation from November 2010 to March 2020, holding positions including SoC Physical Design Engineer, Senior Custom Layout Engineer, and Physical Design Integration Engineer. Prakash Ramesh earned a Master of Science in Microelectronics from the Birla Institute of Technology and Science, Pilani, and received training at the Sandeepani School of VLSI Design in 2002-2003.
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