Premanand Pathri is a highly experienced engineer specializing in ASIC development and physical verification, currently serving as an ASIC Engineer at Cisco since May 2025. Previously, Premanand held the position of Senior Lead Engineer at Qualcomm from November 2019 to May 2025, where responsibilities included resolving complex full chip routing congestion, conducting full chip physical verification, and addressing various LVS and DRC issues across multiple technology nodes, including TSMC 4NM and Samsung 5LP. Prior to Qualcomm, Premanand worked as MTS in Physical Design at Soctronics from November 2011 to November 2019, focusing on cleaning physical verification issues. Premanand holds a Bachelor of Technology degree in Electrical, Electronics, and Communications Engineering from the Institution of Engineers of India and a Diploma in Electronics and Computer Science Engineering from GIOE.
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