Sinan Huang is an experienced engineering professional with a strong background in ASIC design and physical design timing analysis. Currently serving as an ASIC Engineering Technical Leader at Cisco, Sinan has demonstrated expertise in leading engineering projects. Prior experience includes a role as Principal Engineer at Marvell Technology, where significant contributions to technology development were made. Additionally, Sinan has worked at Apple as a Physical Design Timing Engineer, focusing on static timing analysis, which has further enhanced technical skills in the semiconductor industry.
This person is not in the org chart
This person is not in any teams
This person is not in any offices